1. Field of the Invention
The present invention relates to an in-plane switching (IPS) mode liquid crystal display (LCD) device, and more particularly, to an array substrate for an IPS mode LCD device capable of having a sufficient storage capacitance, improving a display image quality and reducing production cost.
2. Discussion of the Related Art
A related art liquid crystal display (LCD) device uses optical anisotropy and polarization properties of liquid crystal molecules. The liquid crystal molecules have a definite alignment direction as a result of their thin and long shapes. The alignment direction of the liquid crystal molecules can be controlled by application of an electric field across the liquid crystal molecules. As the intensity or direction of the electric field is changed, the alignment of the liquid crystal molecules also changes. Since incident light is refracted based on the orientation of the liquid crystal molecules due to the optical anisotropy of the liquid crystal molecules, images can be displayed by controlling light transmissivity.
Since the LCD device including a thin film transistor (TFT) as a switching element, referred to as an active matrix LCD (AM-LCD) device, has excellent characteristics such as high resolution and display of moving images, the AM-LCD device has been widely used.
The AM-LCD device includes an array substrate, a color filter substrate and a liquid crystal layer interposed therebetween. The array substrate may include a pixel electrode and TFT, and the color filter substrate may include a color filter layer and a common electrode. The AM-LCD device is driven by an electric field between the pixel electrode and the common electrode resulting in excellent properties of transmittance and aperture ratio. However, since the AM-LCD device uses a vertical electric field, the AM-LCD device has a bad viewing angle.
An in-plane switching (IPS) mode LCD device may be used to resolve the above-mentioned limitations. The related art IPS mode LCD device includes a color filter substrate, an array substrate facing the color filter substrate, and a liquid crystal layer interposed therebetween. Both common and pixel electrode for driving the liquid crystal layer are formed on the array substrate. On the color filter substrate, a black matrix and a color filter layer are formed without the common electrode. The liquid crystal layer is driven by a horizontal electric field induced between the common and pixel electrodes.
FIGS. 1A and 1B are cross-sectional views showing turned on/off conditions of an IPS mode LCD device according to the related art. As shown in FIG. 1A, when the voltage is applied to the IPS mode LCD device, liquid crystal molecules 11a above the common electrode 17 and the pixel electrode 30 are unchanged. But, liquid crystal molecules 11b between the common electrode 17 and the pixel electrode 30 are horizontally arranged due to the horizontal electric field “L”. Since the liquid crystal molecules are arranged by the horizontal electric field, the IPS mode LCD device has a characteristic of a wide viewing angle. FIG. 1B shows a condition when the voltage is not applied to the IPS mode LCD device. Because an electric field is not generated between the common and pixel electrodes 17 and 30, the arrangement of liquid crystal molecules 11 is not changed.
FIG. 2 is a plan view of a portion of an array substrate for the related art IPS mode LCD device. In FIG. 2, the array substrate 10 for the related art IPS mode LCD device includes a gate line 12, a common line 16, a data line 24, a thin film transistor (TFT) Tr, a plurality of common electrodes 17 and a plurality of pixel electrodes 30. The common line 16 is parallel to and spaced apart from the gate line 12, and the data line 24 crosses the gate line 12 such that a pixel region P is defined on the array substrate 10. The TFT Tr is disposed at a crossing portion of the gate and data lines 12 and 24 and includes a gate electrode 14, a semiconductor layer 20, a source electrode 26 and a drain electrode 28. The gate electrode 14 and the source electrode 26 are connected to the gate and data lines 12 and 24, respectively.
The pixel electrodes 30 in the pixel region P are connected to the drain electrode 28 and spaced apart from each other. The common electrodes 17 are branched from the common line 16 and alternately arranged with the pixel electrodes 30.
One pixel electrode 30, which is parallel to the data line 24, has a major axis along the data line 24 and a minor axis along the gate line 12. As shown in FIG. 3, which shows color filter patterns in the related art IPS mode LCD device, since a red color filter pattern R, a green color filter pattern G and a blue color filter pattern B are required for producing a color image, there are one red color filter pattern R, one green color filter pattern G and one blue color filter pattern B in adjacent three pixel regions P along the gate line 12. To obtain a pixel unit of one red color filter pattern R, one green color filter pattern G and one blue color filter pattern B, one gate line 12 and three data lines 24 are required. Namely, data lines 24 of triple as many as the gate line 12 are required.
A data signal applied to the pixel electrode 30 through the data line 24 should be applied to all pixel regions along one gate line at the same time with a variation in a voltage. Accordingly, for applying the data signal to many data lines, a driving circuit board having a complex circuit structure is required. In addition, a plurality of flexible printed circuit (FPC) including a data driving integrated circuit (IC) chip for control and an electrical connection of the driving circuit board to the data line are required.
The data driving IC chip in the FPC is standardized such that a number of the data line controlled by one data driving IC chip is limited. Accordingly, when an image of high resolution is displayed or the IPS mode LCD device becomes larger, the FPC including much more data driving IC chip in proportion to a number of the increased pixel regions is required. As a result, there is an increase in production cost.
FIG. 4 is a schematic plan view showing the related art IPS mode LCD device with a driving circuit board. As shown in FIG. 4, assuming the related art IPS mode LCD device 60 has a predetermined resolution, six FPCs 67 including the data driving IC chip 64 for connecting the data line (not shown) on the array substrate 62 to the driving circuit board 70 are required.